The present invention relates generally to a method and apparatus for transferring data between two devices, and more particularly a method and apparatus for transferring data between two devices with reduced microprocessor overhead.
Typically, when data is transferred from an initiator device to a target device, a hardware interrupt is generated in the target device which must be serviced by a data processing unit such as a microprocessor of the target device. In particular, the microprocessor must stop executing a software application in order to service the interrupt thus increasing microprocessor overhead.
Write-back caching is an exemplary environment where transferring data from an initiator device to a target device without interrupting a data processor of the target device is useful. In order to provide meaning to the term "without interrupting", it should be noted that the phrase "without interrupting a data processor of the target device", means without generating a hardware interrupt to the data processor such as a microprocessor in response to a data transfer. Thus, the data processor of the target device has no knowledge of the data transfer and any data transfer-related microprocessor overhead is prevented.
Write-back caching refers to a method of executing write requests where a host computer transfers write request data to a caching disk array controller which then transfers the write request data to storage media. Depending upon the particular write-back caching strategy being implemented by the controller, he write request data can either be written immediately to the storage media, or he write request data can be temporarily stored in a cache memory as unwritten or "dirty" data and then "flushed" or written to the storage media at some later point in time. In both cases, the controller sends back status information to the host computer indicating that the write request is complete so that the host computer can continue executing a software application. What is meant herein by the use of the term "dirty data" is data that is located in cache memory which has not yet been written to storage media. To provide meaning to the following terms "flush", "flushed" or "flushing" which are used herein, it should be appreciated that the act of "flushing" data means writing dirty data to storage media.
In bursty host environments, such as when the host computer intermittently has a large number of write requests, write-back caching permits the host computer to quickly transfer all of the write request data to cache memory thus increasing the performance of the host computer by reducing the host computer's overhead in executing a large number of write requests. The increased performance of the host computer when utilizing write-back caching is accompanied by an increased risk of data loss in the event of a controller failure or the like which may occur subsequent to sending the host computer status information but prior to actually writing the data to storage media. Intermediate levels of write request data protection have been developed which involve the use of controller pairs that mirror the write request data for redundancy purposes prior to sending status information to the host computer.
When using two controllers to mirror write request data, a primary controller receives a write request from a host computer. The primary controller then instructs a target or alternate controller to store a copy of the write request data into a cache memory of the alternate controller for redundancy purposes before the primary controller sends status information to the host computer, and before the primary controller places the data on the storage media. The microprocessor of the target controller must typically process the write request data which, as previously mentioned, involves the use of interrupts or other overhead tasks such as sending microprocessor-level acknowledgments, thus reducing performance of the alternate controller.
What is needed therefore is a method for transferring data between two devices in which performance of a target device is not substantially reduced.